Saturday, 31 December 2016

Tuesday, 27 December 2016

Physical design Interview Questions Part 6

Below are interview questions asked by one of the product based company

1. Have you ever worked on on lower nodes, like 14nm or 10nm?
2. what is difference between bulk MOS and FINFET?
3. How conduction takes place in MOS and FINFET transistors?
4. Is Antennae violation is functional failure or Manufacturing error? how can you fix antennae               violation
5. What is short circuit current, and how will you overcome this problem?
6. What is difference between static IR drop and dynamic IR drop?
7. On what all parameters does IR drop and Dynamic IR drop depends on?
8. Have you worked on Physical Verification?
9. What is soft checks in Physical verification?
10. How soft checks different from ERC?
11. What is difference between ERC and PERC?
12. What all the Physical verification test you perform during each stage of Physical design?
13. what XOR checks will do?
14. have you ever worked in STA?
15. have you involved in top level timing or your role limited to block level timing?

16. How OCV (onchip variation diffrent from ) AOCV (advance on chip variation)?
17 what is difference between  AOCV and POCV?
18 how timing related with PTC (postive temperature coefficient) and NTC (negative              temperature coefficient)
19 how derates varies in ocv, aocv and pocv?
20. what all parameter of uncertainty value in STA depends upon pre cts and post cts