Saturday 26 December 2015

Latch Vs Flipflops

  • ·         Both latches and flip-flops are circuit elements whose output depends not only on the present inputs, but also on previous inputs and outputs.
  • ·         They both are hence referred as "sequential" elements.
  • ·         In electronics, a latch, is a kind of bistable multi vibrator, an electronic circuit which has two stable states and thereby can store one bit of of information. Today the word is mainly used for simple transparent storage elements, while slightly more advanced non-transparent (or clocked) devices are described as flip-flops. Informally, as this distinction is quite new, the two words are sometimes used interchangeably.
  • ·         In digital circuits, a flip-flop is a kind of bistable multi vibrator, an electronic circuit which has two stable states and thereby is capable of serving as one bit of memory. Today, the term flip-flop has come to generally denote non-transparent (clocked or edge-triggered) devices, while the simpler transparent ones are often referred to as latches
  • ·         A flip-flop is controlled by (usually) one or two control signals and/or a gate or clock signal.
  • ·         Latches are level sensitive i.e. the output captures the input when the clock signal is high, so as long as the clock is logic 1, the output can change if the input also changes.
  • ·         Flip-Flops are edge sensitive i.e. flip flop will store the input only when there is a rising or falling edge of the clock.
  • ·         A positive level latch is transparent to the positive level(enable), and it latches the final input before it is changing its level(i.e. before enable goes to '0' or before the clock goes to -ve level.)
  • ·         A positive edge flop will have its output effective when the clock input changes from '0' to '1' state ('1' to '0' for negative edge flop) only.
  • ·         Latches are faster, flip flops are slower.
  • ·         Latch is sensitive to glitches on enable pin, whereas flip-flop is immune to glitches.
  • ·         Latches take less gates (less power) to implement than flip-flops.
  • ·         D-FF is built from two latches. They are in master slave configuration.
  • ·         Latch may be clocked or clock less. But flip flop is always clocked.
  • ·         For a transparent latch generally D to Q propagation delay is considered while for a flop clock to Q and setup and hold time are very important.

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