Showing posts with label calculations related to power planning. Show all posts
Showing posts with label calculations related to power planning. Show all posts

Monday, 31 August 2015

Calculation Related to power Planning

Power Calculations
         
 1.  Number Of The Core Power Pad Required For Each Side Of Chip=(Total Core Power)/{(Number Of Side)*(Core Voltage)*Maximum Allowable Current For A I/O Pad)}

  2. Core Current(mA)=(CORE Power)/(Core Voltage )


  3.  Core P/G Ring Width=(Total Core Current)/{(N0.Of.Sides)*(Maximum Current Density Of The Metal Layer Used For Pg Ring)}

                     
  4. Total Current =Total Power Consumption Of Chip(P)/Voltage(V)
        
  5. No.Of Power Pads(Npads) = Itotal/Ip

  6. No.Of Power Pins=Itotal/Ip

                 
      Where,
       Itotal =TOTAL Current
       Ip Obtained From Io Library Specification.
                        
  7. Total Power=Static Power+Dynamic Power
                       =Leakage Power+[Internal Power+Ext Switching Power]
                       =Leakage Power+[{Shortckt+Int Power}]+Ext Switching Power]
                       =Leakage Power+[{(Vdd*Isc)+(C*V*V*F)+(1/2*C*V*V*F)]