A specification for representing logical connectivity and physical layout of and integrated circuit in ASCII format
A DEF file is used to describe all the physical aspects of a design, including
- Die size
- Physical location of cells and macros on the chip.
It contains floor-planning information such as
- Standard cell rows, groups
- Placement and routing blockages
- Placement constraints
- Power domain boundaries.
It also contains the physical representation for pins, signal routing, and power routing, including rings and stripes.