Thursday, 29 October 2015

Glue Logic

Glue logic means non-regular logic, normally a group of gates working asynchronous in static decisions. Regular logic like memory cells is not called "glue".
Glue logic consists of simple gates forming logical decisions. The gates can also be used as rs-ffs or dffs.

In other words, the term glue logic refers to the relatively small amount of simple logic that are used to connect ("glue") –and interface between- larger logic blocks, functions, or devices.)

This sort of logic is implemented in CPLDs, FPGAs or Gate Arrays.
In earlier times only about 1000 gates were called "glue logic". It is normally supporting higher integrated devices with additional functions (data transfer, buffering, reading sensors etc.)


Generally it is recommended to avoid glue logic as mush as possible, because it might cause problems and design complexity later in the chip design flow. You can minimize this logic sometime by merging in inside another module.

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