Tuesday 20 October 2015

How To fix Setup time Violation

What is Setup time?

The setup time is the interval before the clock where the data must be held stable.

Setup Violation can be fixed by
1. reduce the amount of delay in data path, this ca be done by reducing the necessary buffers
2.VT swapping, means you swap HVT cell with SVT or LVT cells
3. upsizing the cells can also prevent the setup violation 
4. Use of two inverters in place of buffer
5. readjusting the position of cells


  1. if i use two inverters instead of buffer what happen?

  2. Transition skew will be reduced.so we can achieve minmum delay

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  4. can we use FF to reduce the setup violation