Monday, 19 October 2015

Virtual Clock

virtual clock as the name suggests doesn't exist physically in the design at all, its just used for the specifying the input / output delay values ( if no clock is existing )
virtual clock can be created same as Create_clock, except that the port/pin name must not be specified !

incase if u have a purely combination path and if u want to specify a set_input_delay or a set_output_delay for that path, then the virtual clock is used



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