Thursday 22 October 2015

Setup Time

Setup Time

  • Setup time is the minimum amount of time the data signal should be held steady before the clock event so that the data are reliably sampled by the clock. This applies to synchronous circuits such as the flip-flop. 
  •  In short I can say that the amount of time the Synchronous input (D) must be stable before the active edge of the Clock. 
  • The Time when input data is available and stable before the clock pulse is applied is called Setup time.

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  1. why do we use setup time analysis?
    its fail what happend in ic

    1. setup time analysis is used ,so that the data before settling becomes stable and and also the formula for it is Required time - Arrival time >= 0

  2. hi this article based on time setupkapil matka
    this applies to synchronous circuit as the flip flop